1. Field
Embodiments described herein relates to an electrically data-rewritable nonvolatile semiconductor memory device.
2. Description of the Related Art
As miniaturization technology approaches its limit, much is expected from stacking of memory cells as a way of improving bit density in nonvolatile semiconductor memory devices such as NAND flash memory. As an example, there is proposed a stacking-type NAND flash memory configured by a memory cell using a vertical-type transistor. The stacking-type NAND flash memory includes a memory string comprising a plurality of memory cells connected in series in the stacking direction, and select transistors provided at both ends of the memory string.
This stacking-type NAND flash memory has a large number of memory strings connected to one bit line and the select transistors are thus required to have excellent cutoff characteristics. At the same time, the manufacturing processes are also required to be simplified and the manufacturing costs kept low. In addition, power consumption is also required to be kept low. It is highly expected that a stacking-type NAND flash memory comprising select transistors simultaneously fulfilling these three different requirements is proposed.